MPMC UNIT-1 INSTRUCTION FORMATS, ADDRESSING MODES OF 8086

                     MICROPROCERSSORS

AND

  MICROCONTROLLERS

     REGULATION /BRANCH :R16/R18  ECE/EEE

                                      UNIT-I

INSTRUCTION FORMATS

A machine language instruction format has one or more number of fields associated with it. The first field is called as operation code field or opcode field, which indicates the type of the operation to be performed by the CPU. The instruction format also contains other fields known as operand fields. The CPU executes the instruction using the information which reside in these fields. 

LABEL	OPCODE/MNEMONIC FIELD	OPERAND FIELD		COMMENT FIELD
FIELD
NEXT:	ADD	AL	,       07H	;Add immediate number 07H to the contents of AL register
		Destination Source

1.A label is a symbol or group of symbols used to represent an address which is not specially known at the time the statement is written. Labels are usually followed by a colon.

2.The opcode field of the instruction contains the mnemonic for the instruction to be performed. Instruction mnemonics are sometimes called operation codes or opcodes.

3.The operand field of the statement contains the data, the memory address, the port address, or the name of the register on which the operation is to be performed. There are two operands-

a)  Source operand which holds source data and

b)  Destination operand which holds destination data

CPU executes the instructions using the information which reside in these fields.

4.The comment field, which starts with a semicolon, need not be the part of the machine language program, but they are very important.

There are six general formats of instructions in 8086 instruction set. The length of an instruction may vary from one byte to six bytes.

The instruction formats are described as follows:

1. One byte Instruction: This format is only one byte long and may have the implied data or register operands. The least significant 3-bits of the opcode are used for specifying the register operand, if any. Otherwise, all the 8-bits form an opcode and the operands are implied.                                                                                                       
2.  Register to Register: This format is 2 bytes long. The first byte of the code specifies the operation code and width of the operand specified by w bit. The second byte of the code shows the register operands and R/M field, as shown below.       
   
   The register represented by the REG field is one of the operands. The R/M field specifies another register or memory location, i.e. the other operand.                                                                                                                               
3. Register to/from Memory with no Displacement :This format is also 2 bytes long and similar to die register to register format except for the MOD field as shown.

 

The MOD field shows the mode of addressing.

 4. Register to/from Memory with Displacement: This type of instruction format contains one or two additional bytes for displacement along with 2-byte the format of the register to/from memory without displacement. The format is as shown below.

5.    Immediate Operand to Register In this format, the first byte as well as the 3-bits from the second byte which are used for REG field in case of register to register format are used for opcode. It also contains one or two bytes of immediate data. The complete instruction format is as shown below.

6.Immediate Operand to Memory with 16-blt Displacement:  This type of instruction format requires 5 or 6 bytes for coding. The first 2 bytes contain the information regarding OPCODE, MOD.and R/M fields. The remaining 4 bytes contain 2 bytes of displacement and 2 bytes of data as shown.

 ADDRESSING MODES OF 8086

 v It indicates way locating or accessing data

v It describes the data types and the way they are accessed for    executing an instruction

v Addressing modes are categorized into two types depending upon  the flow of instruction execution: 

        a) Addressing modes for sequential control flow instructions

b) Addressing modes for control transfer instructions

a) Addressing modes for sequential control flow instructions

 1.Immediate addressing mode : Immediate data is part of the instruction.

                               Eg: MOV AX,1234H

2.Register Addressing mode: Both the operands are  registers

                          Eg: MOV AX,BX

3.Direct addressing mode :  A 16-bit memory offset is specified in the instruction as part of it.                       

                               Eg: MOV AX , [3000H]

In this mode, the 16-bit effective address (EA) is taken directly from the Displacement field of the instruction. The displacement is stored in the location following the instruction opcode.

4. Register Indirect Addressing Mode:

In this mode, the EA is specified in either a pointer register or an index register. The

pointer register can be either base register BX or base pointer register BP and index register can be either Source Index (SI) register or Destination Index (DI) register, The 20-bit physical address is computed using DS and EA.

Eg: MOV BX,[CX]

5. Indexed addressing mode :

In this addressing mode, offset of the operand is stored in one of the index registers.

DS is the default segment for index registers SI and DI. In case of string instructions DS and ES are default segments for SI and DI respectively.

This mode is a special case of the above discussed register indirect addressing mode.

                                   Example :MOV AX, [SI]

6. Based indexed Addressing :

Base-plus-index addressing is similar to indirect addressing because it indirectly

addresses memory data. This addressing uses one base register (BP or BX), and one index register (DI or SI) to indirectly address memory.

        Eg: MOV CX,[BX] [SI]

The base register often holds the beginning location of a memory array, while the index register holds the relative position of an element in the array.

7.Register Relative Addressing :

Register relative addressing is similar to base-plus-index addressing. Here, the data in a segment of memory are addressed by adding the displacement to the contents of a base or an index register (BP, BX, DI or SI).

                                                Eg:MOV AX,03H [BX]

Remember that displacement should be added to the register within the [ ].

8. Relative based indexed Addressing :

The base relative plus index addressing mode is similar to the base plus index

addressing mode, but it also adds a displacement, to a base register and an index register to generate a physical address of the memory.

                                         Eg: MOV AL,10H [BX] [SI]

This addressing mode is suitable to address data within the two dimensional array.          

b) Addressing modes for control transfer instructions

Control transfer instructions transfer the control to a specific destination or target instruction.

This type of instructions does not affect flags.

If the location to which the control is to be transferred lies in a different segment other than the current one it is called inter segment mode.

If the location to which the control is to be transferred lies in the same segment it is called intra segment mode.

Intra Segment direct addressing Mode:

In this addressing mode, the Effective address of a program instruction is specified relative to Instruction Pointer (IP) by  an 8-bit or 16-bit displacement.

In this the address to which the control is to be transferred lies in the same segment.

If the displacement is 8-bit it is called as short jump.

If the displacement is 16-bit it is called as long jump.

Eg:  JZ 0002H/label

JMP NEAR PTR LABEL/ADDRESS

Physical address= 10H* CS+IP+0002H

Intra Segment indirect addressing Mode:

 In this addressing mode, the Effective address of a program instruction is specified relative to Instruction Pointer (IP) by an 8-bit or 16-bit displacement.

The displacement is specified indirectly. This mode is used in unconditional branch instructions.

 In this the address to which the control is to be transferred lies in the same segment.

Eg:  JMP [BX]

Physical address= 10H* CS+IP+BX

Inter Segment direct addressing Mode:

In this the address to which the control is to be transferred lies in a different segment.

Here CS and IP of the destination are specified directly in the instruction. 

Eg:  JMP 5000:0002

Inter Segment indirect addressing Mode:

In this the address to which the control is to be transferred lies in a different segment and it is passed to the instruction indirectly .

Except immediate mode the starting address of the memory block is specified using any addressing mode

                                    Eg:  JMP [BX]

Jump to an address in the other segment specified at offset address in DS that point to a memory block.

Example:

The contents of different registers are given below. Form effective addresses for different addressing modes.

Offset (displacement) = 5000H

[AX]-1000H, [BX]-2000H, [S1]-3000H, [DI]-4000H, [BP]-5000H,

[SP]-6000H, [CS]-0000H, [DS]-1000H, [SS]-2000H, [IP]-7000H.

Shifting a number four times is equivalent to multiplying it by 16D or 10H.

(i) Direct addressing mode

                                MOV AX, [5000H]

DS:OFFSET ó1000:5000

10H* DS       ó10000H

 Offset          ó +5000H

                            15000H-Efeective address

(ii) Register indirect:

                                               MOV AX,[BX]

DS:BX   ó1000:2000

10H*DS ó10000H

                         [BX]      ó+2000

                                12000H-Efeective address

(iii) Register relative

MOV AX, 5000 [BX]

DS: [5000 + BX]

10H*DS ó10000H

 Offset   ó + 5000

[BX]      ó  +2000

                                 17000H - Effective address

(iv) Based indexed

MOV AX, [BX] [SI]

DS:[BX + SI]

10H*DSó 10000H

  [BX] ó    +2000

               [SI]   ó  +3000

      15000H - Effective address

 

(v) Relative based indexed

MOV AX, 5000 [BX] [SI]

DS: [BX + SI + 5000]

10H*DS  ó 10000H

    [BX]    ó  +2000

                             [Sl]     ó  +3000

                          Offset    ó  +5000

                                              1A000 - effective address